Digital Application-Specific Integrated Circuits (ASIC)

Energy-efficient processing architectures and domain-specific processors

Brain-inspired chips and neuromorphic computing

Edge AI and distributed AIoT systems

[New Positions 2025]:

National Key R&D Program for Intelligent Robots, and other platform projects (High-performance computing chips and systems for LLMs, domain-specific chips for brain-inspired embodied intelligence and robots, heterogeneous multi-core SoC design, FPGA for autonomous system and HPC)

Master's students for 2025; Ph.D. students via exempt from admission exam for 2026, Master's students, Fudan University "Zhuobo Program"

Assistant Researchers, Associate Researchers (full-time positions), Super Postdocs

[--The following positions are valid long-term--]

[Welcome to apply for the "Zhuobo Program", an integrated Bachelor-to-Ph.D. program at Fudan University]

[Open Positions: Master's (Fall 2025/26 admission) / Ph.D. students (2026 exempt from admission exam), Postdoctoral Researchers (Shanghai Super Postdoc Program, joint training, etc.), Faculty Positions]:

Digital system design and SoC design and optimization. Applicants with the following interests (one of them) are welcome: (1) SoC architecture and digital system development verification flow; (2) FPGA development; (3) Domain-specific architecture or AI processor design

Ultra-large-scale neuromorphic computing platforms. Applicants with the following interests are welcome: (1) High-speed digital system development; (2) FPGA, high-level synthesis, HW-SW Codesign; (3) NoC/interconnection network design (4) Brain-inspired computing and SNN; (5) 2.5D, 3D, Wafer level Integration

Low-power intelligent chips and systems for AIoT. Applicants with the following interests are welcome: (1) Design and optimization methods for low-power digital circuits; (2) Energy-efficient signal processing algorithms or algorithm-architecture co-optimization methods; (3) Neuromorphic processing and systems; (4) Time-domain spike-driven/event-driven processing methods and systems

Distributed IoT intelligent systems for industrial applications. Applicants with the following interests are welcome: (1) Familiarity with embedded system development and HW-SW Codesign; (2) Developing artificial intelligence on embedded platforms (e.g., TinyML, edge deployment of LLMs, etc.); (3) Experience in lightweight edge intelligent algorithms and applications (e.g., agent-based optimization, time series, anomaly detection, etc.).

Senior Member, IEEE

Vice-chair, IFIP WG8.12

AE of JIII

AE of Frontiers in Neuroscience (Neuromorphic Engineering)

Top 2% of Scientists Worldwide, 2023-2025

Zhuoshi Outstanding Talent, Fudan University, 2023

National Distinguished Young Expert, 2018

Shanghai Pujiang Talent, 2017

2012: Ph.D. in Electronic and Computer Systems, KTH Royal Institute of Technology, Sweden

2007: M.Sc. in Electrical Engineering (System-on-Chip Design), KTH Royal Institute of Technology, Sweden

2005: B.Sc. in Information Engineering, Beijing Institute of Technology, China

2012: MBA (minor), Turku School of Economics, University of Turku, Finland

Short Bio: Zhuo Zou received his Ph.D. degree in Electronic and Computer Systems from KTH Royal Institute of Technology, Sweden, in 2012. Currently, he is with Fudan University Shanghai as a Full Professor, where he is conducting research on energy-efficient chips and systems for intelligent computing and AIoT. Prior to joining Fudan, he was the assistant director and a project leader at VINN iPack Excellence Center, KTH, Sweden. His current research interests include low-power circuits, energy-efficient SoC, neuromorphic computing, and their applications in AIoT and intelligent computing systems. Dr. Zou has also been an adjunct professor and docent at the University of Turku, Finland. He is vice chair of IFIP WG-8.12 and a senior member of IEEE.

Introduction to Electronic Systems (Undergraduate)

Computer Architecture (Undergraduate)

Low-power Integrated Circuits Design, Digital & Systems (Graduate)

Embedded Systems and Applications (Graduate)

Intelligent Computing Systems (Graduate)

Recent & Selected Publications

Link to my Publication List from Google Scholar and DBLP

Brain-Inspired Chips and Neuromorphic Computing

1. F. Yang, et al. "CorTile: A Scalable Neuromorphic Processing Core for Cortical Simulation With Hybrid-Mode Router and TCAM." IEEE TCAS-I 2024 .

2. H. Chu, et al. "A Neuromorphic Processing System with Spike-Driven SNN Processor for Wearable ECG Classification." IEEE TBioCAS 2022.

3. C. Liu, et al. "A Low-Power Hybrid-Precision Neuromorphic Processor With INT8 Inference and INT16 Online Learning in 40-nm CMOS." IEEE TCAS-I 2023 .

4. C. Ding, et al, "A Hybrid-Mode On-Chip Router for the Large-Scale FPGA-Based Neuromorphic Platform," IEEE TCAS-I 2022.

5. D. Wang, et al. "A Memristor-Based Learning Engine for Synaptic Trace-Based Online Learning." IEEE TBioCAS 2 023.

6. D. Wang , et al. " Scalable Multi-FPGA HPC Architecture for Associative Memory System." IEEE TBioCAS 2024.

7. J. Yang, et al. "A 40nm 0.05-1.4uJ/inference Sample-Wise-Adaptive Spiking Neural Network Processor with Dynamic Neuron-Pruning and Unstructured-Model-Aware Architecture ." CICC 2025

8. A. Xiao, et al. "Spiking-HDC: a Spiking Neural Network Processor with HDC Classifier Enabling Transfer Learning ." IEEE ISCAS 2024

9. Y. Yan, et al. "Backpropagation With Sparsity Regularization for Spiking Neural Network Learning," Frontiers in Neuroscience 2022

10. J. Yang, et al. ." A 0.66-mm2 0.49 pJ/SOP SNN Processor with Temporal-Spatial Post-Neuron-Processing and Model-Adaptive Crossbar in 40-nm CMOS ." IEEE TBioCAS 2 025.

11. D. Wang, et al. "FPGA-Based HPC for Associative Memory System." ASP-DAC 2024

Energy-Efficient Processors and AISC

12. H. Ji , et al. " A Communication-Aware and Resource-Efficient NoC-based Architecture for CNN Acceleration", EEE JETCAS 2024

13. J. Huang, et al. "A Reconfigurable Near-Sensor Processor for Anomaly Detection in Limb Prostheses." IEEE TBioCAS 2024

14. B. Huang, et al. " IECA: An In-Execution Configuration CNN Accelerator with 30.55 GOPS/mm2 Area Efficiency." IEEE TCAS-I 2021

15. J. Xu, et al. "ASLog: An Area-Efficient CNN Accelerator for Per-Channel Logarithmic Post-Training Quantization." TCAS-I 2023

16. D. Bao, et al. "A Wirelessly Powered UWB RFID Sensor Tag with Time-Domain Analog-to-Information Interface." IEEE JSSC 2018

17. Y. Huan, et al. "A 101.4 GOPS/W Reconfigurable and Scalable Control-Centric Embedded Processor for Domain-Specific Applications." IEEE TCAS-I 2016

18. S. Tan, et al. "Towards Efficient Eye Tracking in AR/VR Devices: A Near-Eye DVS-Based Processor for Real-time Gaze Estimation." IEEE TCAS-I 2025

19. Z. Yu, et al . " DuoQ: A DSP Utilization-aware and Outlier-free Quantization for FPGA-based LLMs Acceleration. " DAC 2025

20. D. Ji, et al. "A Computation and Energy Efficient Hardware Architecture for SSL Acceleration." ASP-DAC 2025

Edge AI Systems and AIoT Applications

21. Y. Jin, et al. "Edge-based Collaborative Training System for Artificial Intelligence-of-Things." IEEE TII 2022

22. Y. Yan, et al. "An IoT-Based Anti-Counterfeiting System Using Visual Features on QR Code." IEEE Internet of Things Journal, 2020

23. L. Gong, et al. "An IoT-Based Wearable Labor Progress Monitoring System for Remote Evaluation of Admission Time to Hospital." IEEE JBHI, 2023

24. L. Qian, et al. "MCU-Enabled Epileptic Seizure Detection System With Compressed Learning." IEEE Internet of Things Journal, 2023

25. Y. Chen, et al. " CDL-H: Cluster-Based Decentralized Learning With Heterogeneity-Aware Strategies for Industrial Internet of Things," I EEE Internet of Things Journal, 2025